The present invention relates to apparatus for reducing the instruction execution time in a computer employing indirect addressing of a data memory included in the computer, where the absolute address to the data memory is derived in an address calculating unit by means of a base address read from a reference memory in correspondence to an input address and at least one address parameter which has been placed, previously, in a register memory in connection with the execution of an instruction read from the program memory and transferred to a parameter register prior to the address calculation.
Swedish patent specification No. 365,093 describes a computer system in which the various functions are divided into so called function blocks, each of which performing its function in accordance with an individual control program. An instruction sequence corresponding to a certain function may involve a jump to a certain start point in a control program belonging to another function block in order to initiate in that block, e.g. the reading of the contents of a data register with a jump then being made to a third function block in order to have a write-out of the read data onto a readable medium. This communication between the data blocks requires that the respective control program can address the desired start points in the other programs. Thus, according to the conventional technique, each control program is written for the surroundings in which it is to work. To attain maximum flexibility as to changes of the system configurations, introduction of new function blocks, modification of existing blocks, etc. the above mentioned patent specification proposes a special addressing technique which enables changes to be made without affecting indirectly-involved individual control programs with respect to jump addresses. In connection with the execution of a program instruction involving writing or reading in a data memory or a data memory area belonging to a certain function block a considerable amount of time is required for the address calculation since it always involves the reading of a base address from a reference memory in correspondence to an input address, defined by the program instruction, which is then combined with one or more address parameters which have been transferred from a register memory to a parameter register in connection with an address calculating unit. The address parameters are variables which have been placed in the register memory in connection with the execution of an earlier instruction from the program memory. Their purpose is to specify a specific part of the memory area being selected by a base address received from the reference memory. In a system where several such write and read operations are to be performed a large increase in the efficiency can be attained if the waiting times caused by the address calculation routine can be reduced.